Zitat von
MaOfDe:
Zitat:
Reelle Werte (z.b. Single) werden nicht über die Standardregister zurückgegeben sondern über das Register ST(0) der FPU
Aso ^^, ich kenn mich aber leider nur mit den Standardregistern und -befehlen aus, wie lese ich da jetz menen Double- oder Single-Wert raus?
Wenn, wie bei dir zu sein scheint, in Rslt die Adresse für das Resultat steht, dann kannst du das so machen
für single fstp dword ptr [Rslt]
für double fstp qword ptr [Rslt]
für extended fstp tbyte ptr [Rslt]
aus Intels instruction set reference :
FST m32fp Copy ST(0) to m32fp
FST m64fp Copy ST(0) to m64fp
FST ST(i) Copy ST(0) to ST(i)
FSTP m32fp Copy ST(0) to m32fp and pop register stack
FSTP m64fp Copy ST(0) to m64fp and pop register stack
FSTP m80fp Copy ST(0) to m80fp and pop register stack
FSTP ST(i) Copy ST(0) to ST(i) and pop register stack
Description
The FST instruction copies the value in the ST(0) register to the destination operand, which can
be a memory location or another register in the FPU register stack. When storing the value in
memory, the value is converted to single-precision or double-precision floating-point format.
The FSTP instruction performs the same operation as the FST instruction and then pops the
register stack. To pop the register stack, the processor marks the ST(0) register as empty and
increments the stack pointer (TOP) by 1. The FSTP instruction can also store values in memory
in double extended-precision floating-point format.
If the destination operand is a memory location, the operand specifies the address where the first
byte of the destination value is to be stored. If the destination operand is a register, the operand
specifies a register in the register stack relative to the top of the stack.
If the destination size is single-precision or double-precision, the significand of the value being
stored is rounded to the width of the destination (according to rounding mode specified by the
RC field of the FPU control word), and the exponent is converted to the width and bias of the
destination format. If the value being stored is too large for the destination format, a numeric
overflow
exception (#O) is generated and, if the
exception is unmasked, no value is stored in the
destination operand. If the value being stored is a denormal value, the denormal
exception (#D)
is not generated. This condition is simply signaled as a numeric underflow
exception (#U)
condition.
If the value being stored is ±0, ±∞, or a NaN, the least-significant bits of the significand and the
exponent are truncated to fit the destination format. This operation preserves the value’s identity
as a 0, ∞, or NaN.
If the destination operand is a non-empty register, the invalid-operation
exception is not
generated.