@himitsu ,
If your offer for the source still up, and the source is compilable on XE8 then i would like to have look.
Who knows, i might track and find the cause of triggering EXCEPTION_SINGLE_STEP failure, but i don't want to take from you the joy of writing/fixing it !
Away from that, please have a look here:
https://stackoverflow.com/questions/...p-all-the-time
For single step there is only two ways,
1) hardware break point approach with the debugging registers, it must
handle INT1, or
2) software one with the usual trap INT3 each for each step/instruction.
In all cases, what are the values of bit 14 in DR6 and bit 12 in DR7, did you track them ?
https://en.wikipedia.org/wiki/X86_debug_register
The last answer here also is nice and detailed but it does assume single step should work out of box after INT3, but again here comes this part
Zitat:
...
Was going to paste some text above, then changed my mind, the answer is written just fine and brilliantly, need to be understood in full,
the only thing i can do, is to point where what i can guess the problem in your code:
1) You myst not confuse these
Zitat:
exceptions: vector 1 (debug
exception, #
DB) and vector 3 (breakpoint
exception, #BP).
and their usage.
2)
DB and BP mode are controlled by bit 12 in DR7
3) you can/must switch to
DB after a BP, for single step so INT3 comes first then INT1 (this one is an event/signal not instruction), in other words : for single step, BP once then
DB all the way afterward.
Hope that helps you with tracer.
Update : Sorry missed the link
https://stackoverflow.com/questions/...ruction-on-x86